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Rev Age Author Path Log message Diff
309 2695 d 5 h f9daq /cvi/apps/mergertest/ HAPD merger FPGA temperature readout  
308 2698 d 7 h f9daq /cvi/instr/K2231A/ Keithley K2331A initial work  
307 2698 d 7 h f9daq /cvi/instr/WUSBVME_DLL/ bug removed
int WIENER_VMUSB_StackGetUInt32(int maxn, uint32_t *stack);		  
306 2700 d 18 h f9daq /cvi/apps/TempCtrl/ nastavljanje target temperature preko TCPIP  
305 2700 d 18 h f9daq /cvi/apps/TempCtrl/ Dodal TCP Server  
304 2700 d 18 h f9daq /cvi/instr/K6517/ Dodan TCPClient na temperaturni kontroler,
Dodan temperaturni scan		  
303 2702 d 5 h f9daq /cvi/apps/TempCtrl/ TempCtrl  
299 2733 d 6 h f9daq /cvi/apps/l2d2_easyroc/  
298 2776 d 22 h f9daq /cvi/apps/petdaq/ Pet Demo DAQ. 2 modula CAEN_V792 z WIENER_VMUSB + rotacijska mizica Standa  
297 2784 d 6 h f9daq /cvi/instr/pw18-1.8aq/ *Povečana preciznost izpisov
*Dodan graph za napetost
*Dodano nastavljanje Preset kanala		  
294 2802 d 23 h f9daq /cvi/instr/HISTO/ bug in setbincontent  
293 2815 d 18 h f9daq /cvi/instr/AitSipmDAQ/ changed location of the project  
292 2815 d 18 h f9daq /cvi/instr/AitSipmDAQ/ Added support for Standa stages  
291 2820 d 6 h f9daq /cvi/apps/l2d2_easyroc/  
290 2820 d 6 h f9daq /cvi/apps/l2d2_easyroc/  
289 2820 d 6 h f9daq /cvi/apps/qe2d/  
288 2820 d 6 h f9daq /cvi/apps/qe2d/  
287 2820 d 6 h f9daq /cvi/apps/  
286 2820 d 6 h f9daq /cvi/apps/  
285 2820 d 6 h f9daq /cvi/apps/  

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