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#ifndef __PCIIF_H__
//-----------------------------------------------------------------------
// Address definitions of PCI-VME interface designed by A.Rausch
//
// (c) 1999-2004 ARW Elektronik
//
// this source code is published under GPL (Open Source). You can use, redistrubute and
// modify it unless this header is not modified or deleted. No warranty is given that
// this software will work like expected.
// This product is not authorized for use as critical component in life support systems
// wihout the express written approval of ARW Elektronik Germany.
//
// Please announce changes and hints to ARW Elektronik
//
// $Log: pciif.h,v $
// Revision 1.3 2004/07/24 07:07:26 klaus
// Update copyright to 2004
//
// Revision 1.2 2003/11/15 19:12:26 klaus
// Update copyright to 2003
//
// Revision 1.1.1.1 2003/11/14 23:16:33 klaus
// First put into repository
//
// Revision 1.3 2002/10/27 16:17:48 klaus
// Typing bug fixed caused at log addition
//
// Revision 1.2 2002/10/27 16:11:02 klaus
// Added CVS log into header
//
// what who when
// first parts AR 24.11.1997
// converted to new address layout AR 18.05.1998
// next address layout conversion AR 27.06.1998
// no pointer usage at definitions AR 20.02.1999
// first release AR 20.02.1999
// corrected global and local reset AR 18.04.1999
//
#include <vic.h>
/*-----------------------------------------------------------------------*/
/* all addresses relative to PCI-Window */
/*------------- addresses of vmemm local devices ------------------------*/
#define CSR (DWORD)0x0000 /* control status register */
#define VICRES (DWORD)0x0004 /* VIC reset register / interrupt status */
#define ADRHL (DWORD)0x0008 /* AdrH and AdrL as long */
#define VICBASE (DWORD)0x0400 /* base of VIC68A */
#define VECBASE (DWORD)0x0800 /* base of vector registers */
#define VMEBASE (DWORD)0x1000 /* base of 4k VME-BUS window */
/*---------- parts of addresses derived from above ----------------------*/
#define IVEC1 (DWORD)(VECBASE + 3) /* IACK 1 vector */
#define IVEC2 (DWORD)(VECBASE + 5) /* IACK 2 vector */
#define IVEC3 (DWORD)(VECBASE + 7) /* IACK 3 vector */
#define IVEC4 (DWORD)(VECBASE + 9) /* IACK 4 vector */
#define IVEC5 (DWORD)(VECBASE + b) /* IACK 5 vector */
#define IVEC6 (DWORD)(VECBASE + d) /* IACK 6 vector */
#define IVEC7 (DWORD)(VECBASE + f) /* IACK 7 vector */
#define ADRL (DWORD)ADRHL /* word access addr. VME-addr */
#define ADRH (DWORD)(ADRHL + 2)
/*--------- address mask ------------------------------------------------*/
#define VME_ADR_MASK (DWORD)0x00000FFF /* masks lower part of address */
/*--------- some masks in CSR -------------------------------------------*/
#define FLAG_RMC (WORD)0x0001 /* set = next cycle is RMC */
#define FLAG_BLT (WORD)0x0002 /* don't use it. must be 0 */
#define FLAG_WORD (WORD)0x0004 /* it is a word wide interface */
#define FLAG_SYSCTL (WORD)0x0008 /* the system contrl. is enabled */
#define MASK_MODNR (WORD)0x00F0 /* the mask to get the module No */
#define MASK_FPGA (WORD)0x0F00 /* the mask to get the FPGA rev. */
#define MASK_MODTYPE (WORD)0xF000 /* the mask to get type of module*/
/*---------- action commands in VICRES -----------------------------------*/
#define GLOBAL_RESET (WORD)0x000A /* write this to reset the intrfc */
#define LOCAL_RESET (WORD)0x0005 /* generate a local reset */
/*---------- release und inhibit into 0x50 of PLX ------------------------*/
#define RELEASE_VMEMM (WORD)0x4180 /* write this to release access ..*/
#define INHIBIT_VMEMM (WORD)0x4080 /* write this to inhibit access ..*/
#define ENABLE_PCIADA_IRQS (WORD)0x0049 /* enable PCIADA IRQs */
#define DISABLE_PCIADA_IRQS (WORD)0x0009 /* disable PCIADA IRQs */
#define __PCIIF_H__
#endif