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  1. #ifndef PtsModule__H_
  2. #define PtsModule__H_
  3.  
  4. #define BYTE_PER_DOT 8192
  5. #define ADR_CSR0 0x00   // D[1] LEDTEST; D[0] RESET
  6. #define ADR_CLK 0x04    // D[15:12] CLKOUT1; D[11:8] CLKOUT0;
  7.                                         // D[7:4] SCLK; D[3:0] PCLK
  8. #define ADR_VMECLK 0x08 // D[3] CLKOUT1; D[2] CLKOUT0;
  9.                                          // D[1] SCLK; D[0] PCLK
  10. #define ADR_BUSA_REG 0x10
  11. #define ADR_BUSA_IN 0x14
  12. #define ADR_BUSA_DIR 0x18 // D[9:8] BUSA;
  13. #define ADR_CFG 0x40
  14. #define ADR_CSR1 0x44 // D[8] DONE; D[1] VCS_; D[0] PROGRAM_
  15. #define ADR_MODE 0x48
  16. #define ADR_SYSRESET 0xfc // write D=0 to sysreset
  17.  
  18. #define CSR1_PROGRAM_ 0x1
  19. #define CSR1_VCS_ 0x2
  20. #define CSR1_DONE 0x100
  21.  
  22. #define SELECTMAP_MODE 2
  23. #define SLAVESERIAL_MODE 3
  24.  
  25.   int Pts_erase(int);
  26. //  int Pts_configure( const char *filename, int mode=SLAVESERIAL_MODE,
  27. //  int Pts_configure(const char *, int, int );
  28.   int Pts_configure_bit(const char *, int, int);
  29. //  int Pts_configure_rbt(const char *, int, int);
  30.   int Pts_check_configure(int);
  31.   int Pts_reset(int);
  32.  
  33. #define PTSADDR 0x50000000
  34.  
  35.  
  36. //#define Pts_write(VME,DATA) VME_write_32(udev,Ext_NoPriv_Data,PTSADDR+(VME),(DATA))
  37. //#define Pts_read(VME,DATA) VME_read_32(udev,Ext_NoPriv_Data,PTSADDR+(VME),(DATA))
  38.  
  39.  
  40. #endif
  41.