Rev 21 |
Blame |
Compare with Previous |
Last modification |
View Log
| RSS feed
#ifndef __VPCIC32D_H__
#define __VPCIC32D_H__
//-------------------------------------------------------------------------
// WIN95 driver for PCICC32 CAMAC interface from ARW Elektronik, Germany --
//
// vpcic32d.h - the general header file to share information between driver
// and application
//
// (c) 2000,2001 ARW Elektronik
//
// this source code is published under GPL (Open Source). You can use, redistrubute and
// modify it unless this header is not modified or deleted. No warranty is given that
// this software will work like expected.
// This product is not authorized for use as critical component in life support systems
// without the express written approval of ARW Elektronik Germany.
//
// Please announce changes and hints to ARW Elektronik
//
// what who when
// first steps AR 07.03.2000
// added AUTOREAD AR 17.03.2001
// added VPCIC32_ACCESS_LCR AR 30.03.2001
//
// the action codes for ioctl calls
#define VPCIC32_ATTACH_CC32 0x00220000 // METHOD_BUFFERED + FILE_ANY_ACCESS +
#define VPCIC32_DETACH_CC32 0x00220004 // FILE_DEVICE_UNKNOWN
#define VPCIC32_GET_STATUS 0x00220008
#define VPCIC32_CLEAR_STATUS 0x0022000C
#define VPCIC32_SET_ACCESS_PARA 0x00220010
#define VPCIC32_CONTROL_INTERRUPTS 0x00220014
#define VPCIC32_INSTALL_IRQ_HANDLER 0x00220018
#define VPCIC32_ACCESS_LCR 0x00220020 // access tp PLX LCR space
// switches for VPCIC32_ACCESS_COMMAND.wAccessType
#define WORD_ACCESS (UCHAR)2 // word
#define LONG_ACCESS (UCHAR)4 // long
// VPCIC32_ACCESS_LCR access constants
#define LCR_READ 0 // read only access
#define LCR_WRITE 1 // write and read back access
#define LCR_OR 2 // read, bitwise 'or' content and read back access
#define LCR_AND 3 // read, bitwise 'and' content and read back access
#define LCR_WRITE_ONLY 4 // do not read back after write
// define bits for VPCIC32D_ACCESS_COMMAND.wBlockTransfer
#define UNTIL_NOT_Q 0x0001 // read/write unttil 'not Q' switch
#define AUTOREAD 0x0002 // PCIADA data pipelining access tuner switch
// mask bits for interrupt status provided by the user interrupt handler
#define LAM_IRQ 0x00FFFFFF // LAM was responsible for interrupt
#define CONNECTION_TIMEOUT 0x08000000 // irq raised through a connection timeout
#define LAM_BUS_OR 0x10000000 // a LAM-BUS-OR is pending
#define LAM_NOT_OR 0x20000000 // a LAM-NOT-OR is pending
#define LAM_AND_OR 0x40000000 // a LAM-AND-OR is pending
#define LAM_FF 0x80000000 // the LAM-Flip-Flop was set
// this structure is input in all ioctl calls except VPCIC32_SET_ACCESS_PARA
typedef struct
{
DWORD dwInterface; // CC32 module number
} VPCIC32D_DEVICE;
// this structure is output from VPCIC32_ATTACH_CC32 call
typedef struct
{
DWORD dwInterface; // CC32 module number
void *pvWindowBase; // the base address into the 32 kbyte Window of CC32
} VPCIC32D_WINDOW;
// this structure is output from VPCIC32_GET_STATUS call
typedef struct
{
DWORD dwInterface; // CC32 module number
WORD bTimeout; // denotes PCIADA timeout
WORD bInterrupt; // denotes a pending LAM interrupt
} VPCIC32D_STATUS;
// this structure is input to the VPCIC32_SET_ACCESS_PARA call
typedef struct
{
DWORD dwInterface; // CC32 module number
WORD wAccessType; // set the current access type , for compatibilty to NT, not used @ WIN95/98
WORD wBlockTransfer; // set to AUTOREAD or 0
} VPCIC32D_ACCESS_COMMAND;
// this structure is used to control the interrupts
typedef struct
{
DWORD dwInterface; // CC32 module number
WORD wEnable; // a 1 allows, a 0 inhibits interrupt requests
} VPCIC32D_IRQ_CONTROL;
// this structure is used to (de)install a irqhandler to a interface
typedef struct
{
DWORD dwInterface; // CC32 module number
DWORD dwIrqHandler; // void (*IrqHandler)(DWORD)
} VPCIC32D_IRQ_HANLDER;
// structure to access the local configuration space of PLX chip (test / debug only) with VPCIC32_ACCESS_LCR
typedef struct
{
DWORD dwInterface; // CC32 module number
DWORD dwContent; // content to write, and, or
WORD wRegisterAddress; // address offset of LCR register
UCHAR bAccessMode; // LCR_READ, write, or, and
UCHAR bBytesLane; // the data access width
} VPCIC32D_LCR_ACCESS;
#endif // __VPCIC32D_H__