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  1. #ifndef __PCICC32_H__
  2. #define __PCICC32_H__
  3. //-------------------------------------------------------------------------
  4. // WINNT driver for PCICC32 interface from ARW Elektronik, Germany --------
  5. // IO definitions and common data structures between application and driver
  6. //
  7. // (c) 2000,2001 ARW Elektronik
  8. //
  9. // this source code is published under GPL (Open Source). You can use, redistrubute and
  10. // modify it unless this header   is not modified or deleted. No warranty is given that
  11. // this software will work like expected.
  12. // This product is not authorized for use as critical component in life support systems
  13. // wihout the express written approval of ARW Elektronik Germany.
  14. //
  15. // Please announce changes and hints to ARW Elektronik
  16. //
  17. // what                                            who          when
  18. // started                                         AR           16.04.2000
  19. // added irq functionality                         AR           24.02.2001
  20. // added until 'not Q' read/write mode             AR           03.03.2001
  21. // added AUTOREAD                                  AR           17.03.2001
  22. //
  23.  
  24. //-------------------------------------------------------------------------
  25. // INCLUDES
  26. //
  27. // #include <devioctl.h> must be declared before inclusion when used for driver
  28. // #include <winioctl.h> must be declared before inclusion when used for applications
  29.  
  30. //-------------------------------------------------------------------------
  31. // DEFINES
  32. //
  33.  
  34. //----------------------------------------------------------------------------------------
  35. // macros for simple CAMAC NAF address calculation
  36. //
  37. #define NAF(n, a, f) ((ULONG)((n << 10) + (a << 6) + ((f & 0xf) << 2)))
  38.  
  39. // to get a compatible view to WIN95 driver
  40. #define USER_CONTROL_CODE(x) (x)  
  41.  
  42. // VPCIC32D_ATTACH_CC32 and VPCIC32D_DETACH_CC32 are incompatible to WINNT - please use read and write commands
  43.                                
  44. // get the interrupt and timeout status from a CC32 interface (0x00220008)
  45. #define PCICC32_GET_STATUS       CTL_CODE(\
  46.                                                                  FILE_DEVICE_UNKNOWN,\
  47.                                                                  USER_CONTROL_CODE(2),\
  48.                                                                  METHOD_BUFFERED,\
  49.                                                                  FILE_ANY_ACCESS)
  50.  
  51. // clear the timeout status of a CC32 interface (0x0022000C)
  52. #define PCICC32_CLEAR_STATUS     CTL_CODE(\
  53.                                                                  FILE_DEVICE_UNKNOWN,\
  54.                                                                  USER_CONTROL_CODE(3),\
  55.                                                                  METHOD_BUFFERED,\
  56.                                                                  FILE_ANY_ACCESS)
  57.  
  58. // set the access parameter for this file (0x00220010)
  59. #define PCICC32_SET_ACCESS_PARA  CTL_CODE(\
  60.                                                                  FILE_DEVICE_UNKNOWN,\
  61.                                                                  USER_CONTROL_CODE(4),\
  62.                                                                  METHOD_BUFFERED,\
  63.                                                                  FILE_ANY_ACCESS)
  64.  
  65. // allow or inhibit CC32 interrupt requests (0x00220014)
  66. #define PCICC32_CONTROL_INTERRUPTS       CTL_CODE(\
  67.                                                                  FILE_DEVICE_UNKNOWN,\
  68.                                                                  USER_CONTROL_CODE(5),\
  69.                                                                  METHOD_BUFFERED,\
  70.                                                                  FILE_ANY_ACCESS)
  71.  
  72. // requests thru blocking io the status of a pending or a rising interrupt (0x0022001C)
  73. #define PCICC32_INSTALL_IRQ_BLOCK        CTL_CODE(\
  74.                                                                  FILE_DEVICE_UNKNOWN,\
  75.                                                                  USER_CONTROL_CODE(7),\
  76.                                                                  METHOD_BUFFERED,\
  77.                                                                  FILE_ANY_ACCESS)
  78.  
  79. // requests to access the PLX LCR for test and debug (0x00220020)
  80. #define PCICC32_ACCESS_LCR       CTL_CODE(\
  81.                                                                  FILE_DEVICE_UNKNOWN,\
  82.                                                                  USER_CONTROL_CODE(8),\
  83.                                                                  METHOD_BUFFERED,\
  84.                                                                  FILE_ANY_ACCESS)
  85.  
  86. // set to check for control-code overflow
  87. #define PCICC32_LAST_CTL_CODE PCICC32_ACCESS_LCR
  88.  
  89. // mask bits for interrupt status
  90. #define LAM_IRQ             0x00FFFFFF  // there was a LAM responible for the timeout
  91. #define CONNECTION_TIMEOUT      0x08000000  // irq raised through a connection timout
  92. #define LAM_BUS_OR          0x10000000  // a LAM-BUS-OR is pending
  93. #define LAM_NOT_OR          0x20000000  // a LAM-NOT-OR is pending
  94. #define LAM_AND_OR          0x40000000  // a LAM-AND-OR is pending
  95. #define LAM_FF              0x80000000  // the LAM-Flip-Flop was set
  96.  
  97. // switches for PCICC32_ACCESS_COMMAND.wAccessType
  98. #define WORD_ACCESS (UCHAR)2   //            word
  99. #define LONG_ACCESS (UCHAR)4   //            long
  100.  
  101. // define bits for PCICC32_ACCESS_COMMAND.wBlockTransfer
  102. #define UNTIL_NOT_Q         0x0001      // read/write unttil 'not Q' switch
  103. #define AUTOREAD            0x0002      // PCIADA data pipelining access tuner switch
  104.  
  105. // data lane size constants for PCICC32_ACCESS_LCR
  106. #define BYTE_ACCESS (UCHAR)1   // write byte wise (illegal)
  107. #define WORD_ACCESS (UCHAR)2   //       word
  108. #define LONG_ACCESS (UCHAR)4   //       long
  109.  
  110. // PCICC32_ACCESS_LCR access constants
  111. #define LCR_READ       0       // read only access
  112. #define LCR_WRITE      1       // write and read back access
  113. #define LCR_OR         2       // read, bitwise 'or' content and read back access
  114. #define LCR_AND        3       // read, bitwise 'and' content and read back access
  115. #define LCR_WRITE_ONLY 4       // do not read back after write
  116.  
  117. // this structure is output from VPCIC32_GET_STATUS call
  118. typedef struct
  119. {
  120.         ULONG  dwInterface;         // CC32 module number (for compatibility to win95/98 only - not used)
  121.         USHORT bTimeout;            // denotes a pending PCIADA timeout
  122.         USHORT bInterrupt;          // denotes a pending LAM interrupt
  123. } PCICC32_STATUS;    
  124.  
  125. // this structure sets the access parameter for following reads or writes to this path
  126. typedef struct
  127. {
  128.         ULONG  dwInterface;        // CC32 module number (for compatibility to win95/98 only - not used)  
  129.         USHORT wAccessType;                // set the current access type (WORD_ACCESS, LONG_ACCESS)
  130.         USHORT wBlockTransfer;     // set AUTOREAD or UNTIL_NOT_Q
  131. } PCICC32_ACCESS_COMMAND;
  132.  
  133. // this structure is used to control the interrupts
  134. typedef struct
  135. {
  136.         ULONG  dwInterface;        // CC32 module number (for compatibility to win95/98 only - not used)
  137.         USHORT wEnable;            // a 1 allows, a 0 inhibits interrupt requests
  138. } PCICC32_IRQ_CONTROL;
  139.  
  140. // this structure returns from a blocking interrupt status call
  141. typedef struct
  142. {
  143.         ULONG  dwInterface;        // CC32 module number (for compatibility to win95/98 only - not used)
  144.         ULONG  dwInterruptFlags;   // the return status at the return of the blocking call
  145. } PCICC32_IRQ_RESPONSE;  
  146.  
  147. // structure to access the local configuration space of PLX chip (test / debug only) with PCICC32_ACCESS_LCR
  148. typedef struct
  149. {
  150.   ULONG  dwInterface;         // here dummy 'cause of compatibility to WIN95
  151.   ULONG  dwContent;           // content to write, and, or
  152.   USHORT wRegisterAddress;    // address offset of LCR register
  153.   UCHAR  bAccessMode;         // LCR_READ, write, or, and
  154.   UCHAR  bBytesLane;          // the data access width
  155. } PCICC32_LCR_ACCESS;
  156.  
  157. #endif // __PCICC32_H__
  158.