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  1. #ifndef __PCICC32_H__
  2. #define __PCICC32_H__
  3.  
  4. //****************************************************************************
  5. // Copyright (C) 2000-2004  ARW Elektronik Germany
  6. //
  7. //
  8. // This program is free software; you can redistribute it and/or modify
  9. // it under the terms of the GNU General Public License as published by
  10. // the Free Software Foundation; either version 2 of the License, or
  11. // (at your option) any later version.
  12. //
  13. // This program is distributed in the hope that it will be useful,
  14. // but WITHOUT ANY WARRANTY; without even the implied warranty of
  15. // MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  16. // GNU General Public License for more details.
  17. //
  18. // You should have received a copy of the GNU General Public License
  19. // along with this program; if not, write to the Free Software
  20. // Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
  21. //
  22. // This product is not authorized for use as critical component in
  23. // life support systems without the express written approval of
  24. // ARW Elektronik Germany.
  25. //  
  26. // Please announce changes and hints to ARW Elektronik
  27. //
  28. // Maintainer(s): Klaus Hitschler (klaus.hitschler@gmx.de)
  29. //
  30. //****************************************************************************
  31.  
  32. //****************************************************************************
  33. //
  34. // pcicc32.h -- the common header for driver and applications for the PCICC32
  35. // PCI to CAMAC Interface
  36. //
  37. // $Log: pcicc32.h,v $
  38. // Revision 1.7  2004/08/12 19:59:19  klaus
  39. // conversion to kernel-version 2.6, released version 6.0
  40. //
  41. // Revision 1.6  2002/10/15 19:01:17  klaus
  42. // fixed bug in IOCTL defines
  43. //
  44. // Revision 1.5  2002/04/17 19:41:06  klaus
  45. // added support for autoread
  46. //
  47. // Revision 1.4  2002/04/14 18:25:38  klaus
  48. // added interrupt handling, driver 4.4. ...3.5.tar.gz
  49. //
  50. // Revision 1.3  2002/04/10 18:40:10  klaus
  51. // compiled and modified on RedHat 7.2
  52. //
  53. // Revision 1.2  2001/11/20 20:12:50  klaus
  54. // included new header and CVS log
  55. //
  56. //****************************************************************************
  57.  
  58. #include <asm/ioctl.h>
  59.  
  60. #define PCICC32_MAGIC ' '
  61.  
  62. typedef struct
  63. {
  64.         char bConnected;        /* the interface seems to be connected */
  65.         char bFail;                 /* a timeout failure is registered     */
  66.         char bIrq;                  /* a LAM wants to generate a IRQ       */
  67.         char bReserve;          /* not yet used                        */
  68. } PCICC32_STATUS;
  69.  
  70. typedef struct
  71. {
  72.   char bEnable;     /* set to 0 to disable, != 0 to enable */
  73. } PCICC32_IRQ_CONTROL;
  74.  
  75. typedef struct
  76. {
  77.   char bOn;
  78. } PCICC32_AUTOREAD;
  79.  
  80. #define PCICC32_IOSTATE            _IOR(PCICC32_MAGIC, 1, PCICC32_STATUS)       /* get the status of PCICC32              */
  81. #define PCICC32_IOCNTRL            _IO(PCICC32_MAGIC, 2)                                    /* reset a timeout failure, no parameters */
  82. #define PCICC32_CONTROL_INTERRUPTS _IOWR(PCICC32_MAGIC, 3, PCICC32_IRQ_CONTROL) /* set, clear interrupt enable            */
  83. #define PCICC32_IOSTATE_BLOCKING   _IOR(PCICC32_MAGIC, 4, PCICC32_STATUS)       /* calls a blocking IO until interrupt    */
  84. #define PCICC32_AUTOREAD_SWITCH    _IOWR(PCICC32_MAGIC, 4, PCICC32_AUTOREAD)    /* switches autoread on or off            */
  85.  
  86. // the returned cause of the interrupt
  87. #define NOT_MY_INTERRUPT   0
  88. #define PCIADA_INTERRUPT   1
  89. #define CC32_INTERRUPT     2
  90.  
  91. // the LAM (interrupt) masks
  92. #define LAM_IRQ             0x00FFFFFF  // there was a LAM responible for the timeout
  93. #define CONNECTION_TIMEOUT      0x08000000  // irq raised through a connection timout
  94. #define LAM_BUS_OR          0x10000000  // a LAM-BUS-OR is pending
  95. #define LAM_NOT_OR          0x20000000  // a LAM-NOT-OR is pending
  96. #define LAM_AND_OR          0x40000000  // a LAM-AND-OR is pending
  97. #define LAM_FF              0x80000000  // the LAM-Flip-Flop was set
  98.  
  99. #endif /* __PCICC32_H__ */
  100.