WebSVN - f9daq - Blame - Rev 52 - /pts/CAENVMEtypes.h

Rev	Author	Line No.	Line
52	f9daq	1	/*
		2	-----------------------------------------------------------------------------
		3
		4	--- CAEN SpA - Computing Systems Division ---
		5
		6	-----------------------------------------------------------------------------
		7
		8	CAENVMEtypes.h
		9
		10	-----------------------------------------------------------------------------
		11
		12	Author: Stefano Coluccini (s.coluccini@caen.it)
		13
		14	Created: March 2004
		15
		16	-----------------------------------------------------------------------------
		17	*/
		18	#ifndef __CAENVMETYPES_H
		19	#define __CAENVMETYPES_H
		20
		21	#ifdef LINUX
		22	#define CAEN_BYTE unsigned char
		23	#define CAEN_BOOL int
		24	#else
		25	#ifdef _CVI_
		26	#define CAEN_BYTE unsigned char
		27	#define CAEN_BOOL int
		28	#else
		29
		30	#define CAEN_BYTE byte
		31	#define CAEN_BOOL VARIANT_BOOL
		32
		33	#endif
		34	#endif
		35
		36
		37	/*
		38	CAEN VME bridges.
		39	*/
		40	typedef enum CVBoardTypes {
		41	cvV1718 = 0, /* CAEN V1718 USB-VME bridge */
		42	cvV2718 = 1, /* V2718 PCI-VME bridge with optical link */
		43	cvA2818 = 2, /* PCI board with optical link */
		44	cvA2719 = 3, /* Optical link piggy-back */
		45	cvA3818 = 4 /* PCIe board with up to 4 optical links */
		46	} CVBoardTypes;
		47
		48	/*
		49	VME cycles data width.
		50	Ver. 2.2 - Added byte-swapping data widths
		51	*/
		52	typedef enum CVDataWidth {
		53	cvD8 = 0x01, /* 8 bit */
		54	cvD16 = 0x02, /* 16 bit */
		55	cvD32 = 0x04, /* 32 bit */
		56	cvD64 = 0x08, /* 64 bit */
		57	cvD16_swapped = 0x12, /* 16 bit swapped */
		58	cvD32_swapped = 0x14, /* 32 bit swapped */
		59	cvD64_swapped = 0x18 /* 64 bit swapped */
		60	} CVDataWidth;
		61
		62	/*
		63	VME cycles address modifiers
		64	*/
		65	typedef enum CVAddressModifier {
		66	cvA16_S = 0x2D, /* A16 supervisory access */
		67	cvA16_U = 0x29, /* A16 non-privileged */
		68	cvA16_LCK = 0x2C, /* A16 lock command */
		69
		70	cvA24_S_BLT = 0x3F, /* A24 supervisory block transfer */
		71	cvA24_S_PGM = 0x3E, /* A24 supervisory program access */
		72	cvA24_S_DATA = 0x3D, /* A24 supervisory data access */
		73	cvA24_S_MBLT = 0x3C, /* A24 supervisory 64-bit block trnsfer */
		74	cvA24_U_BLT = 0x3B, /* A24 non-privileged block transfer */
		75	cvA24_U_PGM = 0x3A, /* A24 non-privileged program access */
		76	cvA24_U_DATA = 0x39, /* A24 non-privileged data access */
		77	cvA24_U_MBLT = 0x38, /* A24 non-privileged 64-bit block trnsfer */
		78	cvA24_LCK = 0x32, /* A24 lock command */
		79
		80	cvA32_S_BLT = 0x0F, /* A32 supervisory block transfer */
		81	cvA32_S_PGM = 0x0E, /* A32 supervisory program access */
		82	cvA32_S_DATA = 0x0D, /* A32 supervisory data access */
		83	cvA32_S_MBLT = 0x0C, /* A32 supervisory 64-bit block trnsfer */
		84	cvA32_U_BLT = 0x0B, /* A32 non-privileged block transfer */
		85	cvA32_U_PGM = 0x0A, /* A32 non-privileged program access */
		86	cvA32_U_DATA = 0x09, /* A32 non-privileged data access */
		87	cvA32_U_MBLT = 0x08, /* A32 non-privileged 64-bit block trnsfer */
		88	cvA32_LCK = 0x05, /* A32 lock command */
		89
		90	cvCR_CSR = 0x2F, /* CR/CSR space */
		91
		92	/*
		93	The following address modifiers are not yet implemented.
		94	*/
		95
		96	cvA40_BLT = 0x37, /* A40 block transfer (MD32) */
		97	cvA40_LCK = 0x35, /* A40 lock command */
		98	cvA40 = 0x34, /* A40 access */
		99
		100	cvA64 = 0x01, /* A64 single trnsfer access */
		101	cvA64_BLT = 0x03, /* A64 block transfer */
		102	cvA64_MBLT = 0x00, /* A64 64-bit block transfer */
		103	cvA64_LCK = 0x04, /* A64 lock command */
		104
		105	cvA3U_2eVME = 0x21, /* 2eVME for 3U modules */
		106	cvA6U_2eVME = 0x20 /* 2eVME for 6U modules */
		107	} CVAddressModifier;
		108
		109	/*
		110	Error codes returned by the exported functions.
		111	*/
		112	typedef enum CVErrorCodes {
		113	cvSuccess = 0, /* Operation completed successfully */
		114	cvBusError = -1, /* VME bus error during the cycle */
		115	cvCommError = -2, /* Communication error */
		116	cvGenericError = -3, /* Unspecified error */
		117	cvInvalidParam = -4, /* Invalid parameter */
		118	cvTimeoutError = -5, /* Timeout error */
		119	} CVErrorCodes;
		120
		121	/*
		122	Pulser selection.
		123	*/
		124	typedef enum CVPulserSelect {
		125	cvPulserA = 0, /* Identifies the pulser 'A' */
		126	cvPulserB = 1 /* Identifies the pulser 'B' */
		127	} CVPulserSelect;
		128
		129	/*
		130	Output selection.
		131	*/
		132	typedef enum CVOutputSelect {
		133	cvOutput0 = 0, /* Identifies the output line 0 */
		134	cvOutput1 = 1, /* Identifies the output line 1 */
		135	cvOutput2 = 2, /* Identifies the output line 2 */
		136	cvOutput3 = 3, /* Identifies the output line 3 */
		137	cvOutput4 = 4 /* Identifies the output line 4 */
		138	} CVOutputSelect;
		139
		140	/*
		141	Input selection.
		142	*/
		143	typedef enum CVInputSelect {
		144	cvInput0 = 0, /* Identifies the input line 0 */
		145	cvInput1 = 1 /* Identifies the input line 1 */
		146	} CVInputSelect;
		147
		148	/*
		149	Signal sources.
		150	*/
		151	typedef enum CVIOSources {
		152	cvManualSW = 0, /* Manual (button) or software controlled */
		153	cvInputSrc0 = 1, /* Input line 0 */
		154	cvInputSrc1 = 2, /* Input line 1 */
		155	cvCoincidence = 3, /* Inputs coincidence */
		156	cvVMESignals = 4, /* Signals from VME bus */
		157	cvMiscSignals = 6 /* Various internal signals */
		158	} CVIOSources;
		159
		160	/*
		161	Time base units to specify pulses period and width.
		162	*/
		163	typedef enum CVTimeUnits {
		164	cvUnit25ns = 0, /* Time unit is 25 nanoseconds */
		165	cvUnit1600ns = 1, /* Time unit is 1.6 microseconds */
		166	cvUnit410us = 2, /* Time unit is 410 microseconds */
		167	cvUnit104ms = 3 /* Time unit is 104 milliseconds */
		168	} CVTimeUnits;
		169
		170	/*
		171	Polarity for LED emitting.
		172	*/
		173	typedef enum CVLEDPolarity {
		174	cvActiveHigh = 0, /* LED emits on signal high level */
		175	cvActiveLow = 1 /* LED emits on signal low level */
		176	} CVLEDPolarity;
		177
		178	/*
		179	Input and Output signal polarity.
		180	*/
		181	typedef enum CVIOPolarity {
		182	cvDirect = 0, /* Normal polarity */
		183	cvInverted = 1 /* Inverted polarity */
		184	} CVIOPolarity;
		185
		186	/*
		187	Accessible registers.
		188	*/
		189	typedef enum CVRegisters {
		190	cvStatusReg = 0x00, /* Status register */
		191	cvVMEControlReg = 0x01, /* VME Control register */
		192	cvFwRelReg = 0x02, /* Firmware Release register */
		193	cvFwDldReg = 0x03, /* Firmware Download register */
		194	cvFlenaReg = 0x04, /* Flash Enable */
		195	cvVMEIRQEnaReg = 0x06, /* VME IRQ Lines Enable */
		196	cvInputReg = 0x08, /* Input register */
		197	cvOutRegSet = 0x0A, /* Output register */
		198	cvInMuxRegSet = 0x0B, /* Input Multiplexer */
		199	cvOutMuxRegSet = 0x0C, /* Output Multiplexer */
		200	cvLedPolRegSet = 0x0D, /* Led Polarity */
		201	cvOutRegClear = 0x10, /* Output register */
		202	cvInMuxRegClear = 0x11, /* Input Multiplexer */
		203	cvOutMuxRegClear = 0x12, /* Output Multiplexer */
		204	cvLedPolRegClear = 0x13, /* Led Polarity */
		205	cvPulserA0 = 0x16, /* Period and width of Pulser A */
		206	cvPulserA1 = 0x17, /* Num pulses and range of Pulser A */
		207	cvPulserB0 = 0x19, /* Period and width of Pulser B */
		208	cvPulserB1 = 0x1A, /* Num pulses and range of Pulser B */
		209	cvScaler0 = 0x1C, /* Limit and Autores of Scaler A */
		210	cvScaler1 = 0x1D, /* Counter value of Scaler A */
		211	cvDispADL = 0x20, /* Display AD[15:0] */
		212	cvDispADH = 0x21, /* Display AD[31:16] */
		213	cvDispDTL = 0x22, /* Display DT[15:0] */
		214	cvDispDTH = 0x23, /* Display DT[31:16] */
		215	cvDispC1 = 0x24, /* Display Control left bar */
		216	cvDispC2 = 0x25, /* Display Control left bar */
		217	cvLMADL = 0x28, /* Loc. Mon. AD[15:0] */
		218	cvLMADH = 0x29, /* Loc. Mon. AD[31:16] */
		219	cvLMC = 0x2C /* Loc. Mon. Controls */
		220	} CVRegisters;
		221
		222	/*
		223	Bits for status register decoding.
		224	*/
		225	typedef enum CVStatusRegisterBits {
		226	cvSYSRES = 0x0001, /* VME is in system reset state */
		227	cvSYSCTRL = 0x0002, /* The bridge is the VME system controller */
		228	cvDTACK = 0x0010, /* Last access has generated a DTACK signal */
		229	cvBERR = 0x0020, /* Last access has generated a bus error */
		230	cvDIP0 = 0x0100, /* Dip Switch position 0 state */
		231	cvDIP1 = 0x0200, /* Dip Switch position 1 state */
		232	cvDIP2 = 0x0400, /* Dip Switch position 2 state */
		233	cvDIP3 = 0x0800, /* Dip Switch position 3 state */
		234	cvDIP4 = 0x1000, /* Dip Switch position 4 state */
		235	cvUSBTYPE = 0x8000 /* USB Speed: 0 = Full; 1 = High */
		236	} CVStatusRegisterBits;
		237
		238	/*
		239	Bits for input register decoding.
		240	*/
		241	typedef enum CVInputRegisterBits {
		242	cvIn0Bit = 0x0001, /* Input line 0 signal level. */
		243	cvIn1Bit = 0x0002, /* Input line 1 signal level. */
		244	cvCoincBit = 0x0004, /* Coincidence of input signal level. */
		245	cvPulsAOutBit = 0x0008, /* Pulser A output signal level. */
		246	cvPulsBOutBit = 0x0010, /* Pulser B output signal level. */
		247	cvScalEndCntBit = 0x0020, /* Scaler end counter signal level. */
		248	cvLocMonBit = 0x0040, /* Location monitor signal level. */
		249	} CVInputRegisterBits;
		250
		251	/*
		252	Bits for input register decoding.
		253	*/
		254	typedef enum CVOutputRegisterBits {
		255	cvPulsAStartBit = 0x0001, /* Pulser A start signal level. */
		256	cvPulsAResetBit = 0x0002, /* Pulser A reset signal level. */
		257	cvPulsBStartBit = 0x0004, /* Pulser B start signal level. */
		258	cvPulsBResetBit = 0x0008, /* Pulser B reset signal level. */
		259	cvScalGateBit = 0x0010, /* Scaler gate signal level. */
		260	cvScalResetBit = 0x0020, /* Scaler reset counter signal level. */
		261	cvOut0Bit = 0x0040, /* Output line 0 signal level. */
		262	cvOut1Bit = 0x0080, /* Output line 1 signal level. */
		263	cvOut2Bit = 0x0100, /* Output line 2 signal level. */
		264	cvOut3Bit = 0x0200, /* Output line 3 signal level. */
		265	cvOut4Bit = 0x0400, /* Output line 4 signal level. */
		266	} CVOutputRegisterBits;
		267
		268	/*
		269	Types of VME Arbiter.
		270	*/
		271	typedef enum CVArbiterTypes {
		272	cvPriorized = 0, /* Priority Arbiter */
		273	cvRoundRobin = 1 /* Round-Robin Arbiter */
		274	} CVArbiterTypes;
		275
		276	/*
		277	Types of VME Bus Requester.
		278	*/
		279	typedef enum CVRequesterTypes {
		280	cvFair = 0, /* Fair bus requester */
		281	cvDemand = 1 /* On demand bus requester */
		282	} CVRequesterTypes;
		283
		284	/*
		285	Types of VME Bus release.
		286	*/
		287	typedef enum CVReleaseTypes {
		288	cvRWD = 0, /* Release When Done */
		289	cvROR = 1 /* Release On Request */
		290	} CVReleaseTypes;
		291
		292	/*
		293	VME bus request levels.
		294	*/
		295	typedef enum CVBusReqLevels {
		296	cvBR0 = 0, /* Bus request level 0 */
		297	cvBR1 = 1, /* Bus request level 1 */
		298	cvBR2 = 2, /* Bus request level 2 */
		299	cvBR3 = 3 /* Bus request level 3 */
		300	} CVBusReqLevels;
		301
		302	/*
		303	VME Interrupt levels.
		304	*/
		305	typedef enum CVIRQLevels {
		306	cvIRQ1 = 0x01, /* Interrupt level 1 */
		307	cvIRQ2 = 0x02, /* Interrupt level 2 */
		308	cvIRQ3 = 0x04, /* Interrupt level 3 */
		309	cvIRQ4 = 0x08, /* Interrupt level 4 */
		310	cvIRQ5 = 0x10, /* Interrupt level 5 */
		311	cvIRQ6 = 0x20, /* Interrupt level 6 */
		312	cvIRQ7 = 0x40 /* Interrupt level 7 */
		313	} CVIRQLevels;
		314
		315	/*
		316	VME bus timeouts.
		317	*/
		318	typedef enum CVVMETimeouts {
		319	cvTimeout50us = 0, /* Timeout is 50 microseconds */
		320	cvTimeout400us = 1 /* Timeout is 400 microseconds */
		321	} CVVMETimeouts;
		322
		323	/*
		324	Data type to store the front panel display last access data.
		325	*/
		326	typedef struct CVDisplay {
		327	long cvAddress; /* VME Address */
		328	long cvData; /* VME Data */
		329	long cvAM; /* Address modifier */
		330	long cvIRQ; /* IRQ levels */
		331	CAEN_BOOL cvDS0; /* Data Strobe 0 signal */
		332	CAEN_BOOL cvDS1; /* Data Strobe 1 signal */
		333	CAEN_BOOL cvAS; /* Address Strobe signal */
		334	CAEN_BOOL cvIACK; /* Interrupt Acknowledge signal */
		335	CAEN_BOOL cvWRITE; /* Write signal */
		336	CAEN_BOOL cvLWORD; /* Long Word signal */
		337	CAEN_BOOL cvDTACK; /* Data Acknowledge signal */
		338	CAEN_BOOL cvBERR; /* Bus Error signal */
		339	CAEN_BOOL cvSYSRES; /* System Reset signal */
		340	CAEN_BOOL cvBR; /* Bus Request signal */
		341	CAEN_BOOL cvBG; /* Bus Grant signal */
		342	} CVDisplay;
		343
		344	#endif // __CAENVMETYPES_H

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