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| Rev | Author | Line No. | Line |
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| 19 | f9daq | 1 | //------------------------------------------------------------------------- |
| 2 | // WINNT driver for PCIVME interface from ARW Elektronik, Germany --------- |
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| 3 | // all around irq handling |
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| 4 | // |
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| 5 | // (c) 1999-2004 ARW Elektronik |
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| 6 | // |
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| 7 | // this source code is published under GPL (Open Source). You can use, redistrubute and |
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| 8 | // modify it unless this header is not modified or deleted. No warranty is given that |
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| 9 | // this software will work like expected. |
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| 10 | // This product is not authorized for use as critical component in life support systems |
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| 11 | // wihout the express written approval of ARW Elektronik Germany. |
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| 12 | // |
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| 13 | // Please announce changes and hints to ARW Elektronik |
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| 14 | // |
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| 15 | // $Log: pcivme_i.c,v $ |
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| 16 | // Revision 1.3 2004/07/24 07:07:26 klaus |
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| 17 | // Update copyright to 2004 |
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| 18 | // |
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| 19 | // Revision 1.2 2003/11/15 19:12:50 klaus |
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| 20 | // Update copyright to 2003 |
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| 21 | // |
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| 22 | // Revision 1.1.1.1 2003/11/14 23:16:33 klaus |
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| 23 | // First put into repository |
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| 24 | // |
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| 25 | // Revision 1.3 2002/10/27 16:17:48 klaus |
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| 26 | // Typing bug fixed caused at log addition |
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| 27 | // |
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| 28 | // Revision 1.2 2002/10/27 16:11:02 klaus |
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| 29 | // Added CVS log into header |
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| 30 | // |
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| 31 | // what who when |
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| 32 | // started AR 01.08.1999 |
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| 33 | // first release 1.0 AR 17.10.1999 |
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| 34 | // IoConnectInterrupt, share vector now true AR 04.03.2000 |
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| 35 | // changed resource allocation caused by WIN2000 AR 08.06.2002 |
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| 36 | // |
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| 37 | |||
| 38 | //------------------------------------------------------------------------- |
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| 39 | // COMMENTS |
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| 40 | // |
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| 41 | // Each path (file_obj) maintains its own FIFO to hold incoming vector from |
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| 42 | // hardware acknowledged interrupts. These FIFOs are always accessible for read |
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| 43 | // while the path is open. In case a path enables its interrupts the link to |
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| 44 | // its FIFO is included in a list of "interrupt enabled" FIFOs. The opposite |
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| 45 | // happens when a path disables its interrupts. |
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| 46 | // There are up to MAX_PCIADA lists of "interrupt enabled" FIFOs, each list is |
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| 47 | // associated to a PCIADA (pciada). |
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| 48 | // Each time a pciada receives a interrupt request the software first checks |
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| 49 | // for a bus error interrupt. This kind of requests are directly associated with |
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| 50 | // a user initiated access and put forward to the accessor. (Excluding spurious |
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| 51 | // interrupts). If the request is no bus error request the vector is pushed |
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| 52 | // into all FIFOs queued for this PCIADA. |
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| 53 | // After this a DPC call is fired to wake up queued IRPs waiting for a vector. |
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| 54 | // The DPC call iterates through the list of FIFOs and looks if a queued IRP |
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| 55 | // exists for this path. If so the vector is pulled off the FIFO and the IRP |
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| 56 | // is released. |
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| 57 | // If a IRP arrives to request a vector the driver checks if there is a vector |
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| 58 | // stored in the path associated FIFO. If so the IRP returns immediately with |
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| 59 | // the pulled vector from the FIFO. If not the IRP is queued in a PCIADA |
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| 60 | // associated queue of pending IRPs. |
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| 61 | // When the interrupts for a path are disabled all pending vectors in the FIFO |
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| 62 | // associated with this path are still available. But if the FIFO is empty |
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| 63 | // request to get the next vector will block. |
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| 64 | |||
| 65 | //------------------------------------------------------------------------- |
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| 66 | // INCLUDES |
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| 67 | // |
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| 68 | #include <ntddk.h> |
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| 69 | #include <pcivme_drv.h> |
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| 70 | #include <pcivme_i.h> |
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| 71 | #include <pcivme.h> |
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| 72 | #include <pciif.h> |
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| 73 | #include <pcivme_fifo.h> |
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| 74 | |||
| 75 | //------------------------------------------------------------------------ |
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| 76 | // DEFINES |
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| 77 | // |
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| 78 | #ifndef DWORD |
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| 79 | #define DWORD ULONG |
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| 80 | #endif |
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| 81 | |||
| 82 | #ifndef WORD |
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| 83 | #define WORD USHORT |
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| 84 | #endif |
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| 85 | |||
| 86 | //------------------------------------------------------------------------ |
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| 87 | // GLOBALS |
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| 88 | // |
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| 89 | |||
| 90 | //------------------------------------------------------------------------ |
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| 91 | // FUNCTIONS |
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| 92 | // |
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| 93 | |||
| 94 | //------------------------------------------------------------------------ |
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| 95 | // determine which interrupt and evaluates vector |
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| 96 | // |
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| 97 | static UCHAR evaluate_vector(PCIADA *pciada) |
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| 98 | { |
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| 99 | USHORT wIntCSR = READ_REGISTER_USHORT(pciada->pwIntCSR); |
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| 100 | USHORT offset; |
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| 101 | USHORT wCntrl = READ_REGISTER_USHORT(pciada->pwCntrl); |
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| 102 | |||
| 103 | if (wCntrl & 0x100) // pciada switched on ? |
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| 104 | { |
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| 105 | if ((wIntCSR & 0x68) == 0x68) |
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| 106 | { |
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| 107 | // it's the pci interrupt # 2 |
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| 108 | |||
| 109 | // get current Cntrl - and clear interrupt |
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| 110 | wCntrl &= ~0x0100; // disable |
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| 111 | WRITE_REGISTER_USHORT(pciada->pwCntrl, wCntrl); |
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| 112 | wCntrl |= 0x0100; // enable again |
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| 113 | WRITE_REGISTER_USHORT(pciada->pwCntrl, wCntrl); |
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| 114 | return 1; |
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| 115 | } |
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| 116 | |||
| 117 | if ((wIntCSR & 0x45) == 0x45) |
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| 118 | { |
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| 119 | // it's the interrupt # 1 |
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| 120 | offset = READ_REGISTER_USHORT(pciada->pwIRQStat); |
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| 121 | |||
| 122 | if (offset & 1) |
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| 123 | return 0xff & READ_REGISTER_UCHAR((PUCHAR)pciada->pbVector + offset); |
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| 124 | } |
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| 125 | } |
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| 126 | |||
| 127 | return 0; |
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| 128 | } |
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| 129 | |||
| 130 | //------------------------------------------------------------------------ |
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| 131 | // enable and disable of interrupts |
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| 132 | // |
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| 133 | void globalInterruptEnable(PCIADA *pciada) |
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| 134 | { |
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| 135 | WRITE_REGISTER_USHORT(pciada->pwIntCSR, ENABLE_PCIADA_IRQS); |
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| 136 | } |
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| 137 | |||
| 138 | void globalInterruptDisable(PCIADA *pciada) |
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| 139 | { |
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| 140 | WRITE_REGISTER_USHORT(pciada->pwIntCSR, DISABLE_PCIADA_IRQS); |
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| 141 | } |
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| 142 | |||
| 143 | //------------------------------------------------------------------------ |
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| 144 | // insert the vector in a queue of interrupts (and rescue waiting IRPs) |
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| 145 | // |
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| 146 | static void InsertInIrqQueues(PCIADA *pciada, UCHAR vector) |
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| 147 | { |
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| 148 | FIFO_LIST *next; |
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| 149 | KIRQL oldIrqlList; |
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| 150 | register PLIST_ENTRY pList = &pciada->IrqListList; |
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| 151 | |||
| 152 | KdPrint(("InsertInIrqQueues\n")); |
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| 153 | |||
| 154 | // iterate all fifos and insert the vector in each fifo |
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| 155 | KeAcquireSpinLock(&pciada->IrqListLock, &oldIrqlList); |
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| 156 | |||
| 157 | while (pList->Flink != &pciada->IrqListList) |
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| 158 | { |
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| 159 | pList = pList->Flink; |
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| 160 | next = CONTAINING_RECORD(pList, FIFO_LIST, entry); |
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| 161 | |||
| 162 | KdPrint(("Vector %d pushed\n", vector)); |
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| 163 | |||
| 164 | // push the vector into the fifo |
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| 165 | PushElement(next->pIrqListHandle, vector); |
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| 166 | } |
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| 167 | |||
| 168 | KeReleaseSpinLock(&pciada->IrqListLock, oldIrqlList); |
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| 169 | |||
| 170 | // more handling in the deffered procedure call |
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| 171 | KeInsertQueueDpc(&pciada->kDPCobj, (PVOID)pciada, (PVOID)&vector); |
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| 172 | } |
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| 173 | |||
| 174 | //------------------------------------------------------------------------ |
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| 175 | // main interrupt handler function |
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| 176 | // |
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| 177 | BOOLEAN irq_service(PKINTERRUPT Interrupt, PVOID ServiceContext) |
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| 178 | { |
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| 179 | PCIADA *pciada = (PCIADA *)ServiceContext; |
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| 180 | UCHAR vector; |
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| 181 | UNREFERENCED_PARAMETER(Interrupt); |
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| 182 | vector = evaluate_vector(pciada); |
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| 183 | if (!(vector)) return FALSE; |
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| 184 | |||
| 185 | KdPrint(("irq_service: %d\n", vector & 0xff)); |
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| 186 | |||
| 187 | if ((pciada->pbBusError) && ((vector == 7) || (vector == 1))) |
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| 188 | *pciada->pbBusError = TRUE; |
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| 189 | else |
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| 190 | InsertInIrqQueues(pciada, vector); // insert at top of the queues |
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| 191 | |||
| 192 | return TRUE; |
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| 193 | } |
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| 194 | |||
| 195 | //------------------------------------------------------------------------ |
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| 196 | // translate interrupt resources for PCIADAs to neutral ones |
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| 197 | // |
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| 46 | f9daq | 198 | /* |
| 19 | f9daq | 199 | NTSTATUS PCIVMETranslateInterrupts(PDEVICE_OBJECT device_Obj) |
| 200 | { |
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| 201 | int i; |
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| 202 | NTSTATUS result = STATUS_SUCCESS; |
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| 203 | DEVICE_EXT *pDevExt = (DEVICE_EXT*)device_Obj->DeviceExtension; |
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| 204 | int nPCIADAs = pDevExt->nPCIADAs; |
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| 205 | PCIADA *pciada = (PCIADA *) NULL; |
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| 206 | |||
| 207 | KdPrint(("TranslateInterrupt()\n")); |
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| 41 | f9daq | 208 | if (nPCIADAs) return STATUS_SUCCESS; |
| 19 | f9daq | 209 | |
| 210 | for (i = 0; i < nPCIADAs; i++) |
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| 211 | { |
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| 212 | pciada = &pDevExt->pciada[i]; |
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| 213 | |||
| 214 | KdPrint(("In - Bus:%d, IrqLine:%d\n", pciada->Bus, pciada->Irql)); |
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| 215 | |||
| 216 | if (pciada->Irql) |
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| 217 | { |
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| 218 | pciada->Vector = HalGetInterruptVector(PCIBus, pciada->Bus, |
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| 219 | pciada->Irql, |
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| 220 | pciada->Vector, |
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| 221 | &pciada->Irql, &pciada->Affinity); |
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| 222 | } |
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| 223 | else |
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| 224 | result = STATUS_BIOS_FAILED_TO_CONNECT_INTERRUPT; |
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| 225 | } |
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| 226 | |||
| 227 | KdPrint(("Out - Irql:%d, Vector: %d, Affinity:%d\n", pciada->Irql, pciada->Vector, pciada->Affinity)); |
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| 228 | |||
| 229 | return result; |
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| 230 | } |
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| 46 | f9daq | 231 | */ |
| 19 | f9daq | 232 | |
| 233 | //------------------------------------------------------------------------ |
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| 234 | // connect service routines to all PCIADA interrupts |
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| 235 | // |
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| 236 | NTSTATUS PCIVMEConnectInterrupt(PDEVICE_OBJECT device_Obj) |
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| 237 | { |
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| 238 | int i; |
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| 239 | NTSTATUS result = STATUS_SUCCESS; |
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| 240 | DEVICE_EXT *pDevExt = (DEVICE_EXT*)device_Obj->DeviceExtension; |
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| 241 | int nPCIADAs = pDevExt->nPCIADAs; |
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| 242 | PCIADA *pciada; |
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| 243 | |||
| 244 | KdPrint(("ConnectInterrupt()\n")); |
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| 245 | |||
| 246 | // connect the interrupts to service routines |
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| 247 | for (i = 0; i < nPCIADAs; i++) |
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| 248 | { |
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| 249 | pciada = &pDevExt->pciada[i]; |
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| 250 | |||
| 251 | pciada->InterruptObject = NULL; |
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| 252 | |||
| 253 | if (pciada->Vector) |
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| 254 | result = IoConnectInterrupt(&pciada->InterruptObject, |
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| 255 | irq_service, |
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| 256 | (PVOID)pciada, |
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| 257 | NULL, |
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| 258 | pciada->Vector, |
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| 259 | pciada->Irql, |
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| 260 | pciada->Irql, |
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| 261 | LevelSensitive, |
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| 262 | TRUE, |
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| 263 | pciada->Affinity, |
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| 264 | FALSE); |
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| 265 | |||
| 266 | KdPrint(("pIrqObj:0x%08x, VirtVect:%d, Irql:%d, hIrql:%d, Aff:0x%08x, Status:0x%08x\n", |
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| 267 | pciada->InterruptObject, |
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| 268 | pciada->Vector, pciada->Irql, pciada->Irql, pciada->Affinity, result)); |
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| 269 | |||
| 270 | if (result != STATUS_SUCCESS) break; |
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| 271 | } |
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| 272 | |||
| 273 | return result; |
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| 274 | } |
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| 275 | |||
| 276 | //------------------------------------------------------------------------ |
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| 277 | // dis-connect service routines to all PCIADA interrupts |
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| 278 | // |
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| 279 | NTSTATUS PCIVMEDisConnectInterrupt(PDEVICE_OBJECT device_Obj) |
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| 280 | { |
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| 281 | int i; |
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| 282 | DEVICE_EXT *pDevExt = (DEVICE_EXT*)device_Obj->DeviceExtension; |
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| 283 | int nPCIADAs = pDevExt->nPCIADAs; |
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| 284 | PCIADA *pciada; |
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| 285 | |||
| 286 | KdPrint(("DisConnectInterrupt()\n")); |
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| 287 | |||
| 288 | // dis connect the interrupts to service routines |
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| 289 | for (i = 0; i < nPCIADAs; i++) |
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| 290 | { |
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| 291 | pciada = &pDevExt->pciada[i]; |
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| 292 | |||
| 293 | KdPrint(("IrqObj:0x%08x\n", pciada->InterruptObject)); |
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| 294 | |||
| 295 | if (pciada->InterruptObject) |
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| 296 | IoDisconnectInterrupt(pciada->InterruptObject); |
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| 297 | } |
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| 298 | |||
| 299 | return STATUS_SUCCESS; |
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| 300 | } |
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| 301 | |||
| 302 |