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#ifndef __PCIIF_H__
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//-----------------------------------------------------------------------
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// Address definitions of PCI-VME interface designed by A.Rausch         
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//                                                                       
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// (c) 1999-2004 ARW Elektronik
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//
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// this source code is published under GPL (Open Source). You can use, redistrubute and 
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// modify it unless this header   is not modified or deleted. No warranty is given that 
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// this software will work like expected.
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// This product is not authorized for use as critical component in life support systems
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// wihout the express written approval of ARW Elektronik Germany.
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//
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// Please announce changes and hints to ARW Elektronik
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//
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// $Log: pciif.h,v $
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// Revision 1.3  2004/07/24 07:07:26  klaus
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// Update copyright to 2004
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//
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// Revision 1.2  2003/11/15 19:12:26  klaus
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// Update copyright to 2003
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//
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// Revision 1.1.1.1  2003/11/14 23:16:33  klaus
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// First put into repository
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//
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// Revision 1.3  2002/10/27 16:17:48  klaus
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// Typing bug fixed caused at log addition
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//
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// Revision 1.2  2002/10/27 16:11:02  klaus
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// Added CVS log into header
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//
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// what                                              who   when          
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// first parts                                       AR    24.11.1997    
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// converted to new address layout                   AR    18.05.1998    
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// next address layout conversion                    AR    27.06.1998    
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// no pointer usage at definitions                   AR    20.02.1999    
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// first release                                     AR    20.02.1999    
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// corrected global and local reset                  AR    18.04.1999
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//
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#include <vic.h>
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/*-----------------------------------------------------------------------*/
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/* all addresses relative to PCI-Window                                  */
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/*------------- addresses of vmemm local devices ------------------------*/
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#define CSR     (DWORD)0x0000 /* control status register                 */
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#define VICRES  (DWORD)0x0004 /* VIC reset register / interrupt status   */
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#define ADRHL   (DWORD)0x0008 /* AdrH and AdrL as long                   */
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#define VICBASE (DWORD)0x0400 /* base of VIC68A                          */
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#define VECBASE (DWORD)0x0800 /* base of vector registers                */
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#define VMEBASE (DWORD)0x1000 /* base of 4k VME-BUS window               */
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/*---------- parts of addresses derived from above ----------------------*/
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#define IVEC1   (DWORD)(VECBASE + 3)    /* IACK 1 vector                 */
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#define IVEC2   (DWORD)(VECBASE + 5)    /* IACK 2 vector                 */
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#define IVEC3   (DWORD)(VECBASE + 7)    /* IACK 3 vector                 */
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#define IVEC4   (DWORD)(VECBASE + 9)    /* IACK 4 vector                 */
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#define IVEC5   (DWORD)(VECBASE + b)    /* IACK 5 vector                 */
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#define IVEC6   (DWORD)(VECBASE + d)    /* IACK 6 vector                 */
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#define IVEC7   (DWORD)(VECBASE + f)    /* IACK 7 vector                 */
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#define ADRL    (DWORD)ADRHL            /* word access addr. VME-addr    */ 
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#define ADRH    (DWORD)(ADRHL + 2)
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/*--------- address mask ------------------------------------------------*/
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#define VME_ADR_MASK (DWORD)0x00000FFF  /* masks lower part of address   */
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/*--------- some masks in CSR -------------------------------------------*/
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#define FLAG_RMC     (WORD)0x0001       /* set = next cycle is RMC       */
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#define FLAG_BLT     (WORD)0x0002       /* don't use it. must be 0       */
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#define FLAG_WORD    (WORD)0x0004       /* it is a word wide interface   */
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#define FLAG_SYSCTL  (WORD)0x0008       /* the system contrl. is enabled */
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#define MASK_MODNR   (WORD)0x00F0       /* the mask to get the module No */
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#define MASK_FPGA    (WORD)0x0F00       /* the mask to get the FPGA rev. */
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#define MASK_MODTYPE (WORD)0xF000       /* the mask to get type of module*/
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/*---------- action commands in VICRES -----------------------------------*/
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#define GLOBAL_RESET (WORD)0x000A       /* write this to reset the intrfc */
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#define LOCAL_RESET  (WORD)0x0005       /* generate a local reset         */
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/*---------- release und inhibit into 0x50 of PLX ------------------------*/
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#define RELEASE_VMEMM (WORD)0x4180      /* write this to release access ..*/
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#define INHIBIT_VMEMM (WORD)0x4080      /* write this to inhibit access ..*/
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#define ENABLE_PCIADA_IRQS  (WORD)0x0049 /* enable PCIADA IRQs            */
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#define DISABLE_PCIADA_IRQS (WORD)0x0009 /* disable PCIADA IRQs           */
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#define __PCIIF_H__
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#endif