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#ifndef __PCICC32_H__
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#define __PCICC32_H__
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//-------------------------------------------------------------------------
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// WINNT driver for PCICC32 interface from ARW Elektronik, Germany --------
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// IO definitions and common data structures between application and driver
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//
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// (c) 2000,2001 ARW Elektronik
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//
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// this source code is published under GPL (Open Source). You can use, redistrubute and 
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// modify it unless this header   is not modified or deleted. No warranty is given that 
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// this software will work like expected.
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// This product is not authorized for use as critical component in life support systems
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// wihout the express written approval of ARW Elektronik Germany.
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//
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// Please announce changes and hints to ARW Elektronik
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//
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// what                                            who          when
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// started                                         AR           16.04.2000
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// added irq functionality                         AR           24.02.2001
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// added until 'not Q' read/write mode             AR           03.03.2001
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// added AUTOREAD                                  AR           17.03.2001
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//
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//-------------------------------------------------------------------------
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// INCLUDES
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//
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// #include <devioctl.h> must be declared before inclusion when used for driver
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// #include <winioctl.h> must be declared before inclusion when used for applications
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//-------------------------------------------------------------------------
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// DEFINES
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//
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//----------------------------------------------------------------------------------------
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// macros for simple CAMAC NAF address calculation
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//
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#define NAF(n, a, f) ((ULONG)((n << 10) + (a << 6) + ((f & 0xf) << 2)))
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// to get a compatible view to WIN95 driver 
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#define USER_CONTROL_CODE(x) (x)  
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// VPCIC32D_ATTACH_CC32 and VPCIC32D_DETACH_CC32 are incompatible to WINNT - please use read and write commands
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// get the interrupt and timeout status from a CC32 interface (0x00220008)
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#define PCICC32_GET_STATUS       CTL_CODE(\
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                                                                 FILE_DEVICE_UNKNOWN,\
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                                                                 USER_CONTROL_CODE(2),\
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                                                                 METHOD_BUFFERED,\
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                                                                 FILE_ANY_ACCESS)
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// clear the timeout status of a CC32 interface (0x0022000C)
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#define PCICC32_CLEAR_STATUS     CTL_CODE(\
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                                                                 FILE_DEVICE_UNKNOWN,\
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                                                                 USER_CONTROL_CODE(3),\
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                                                                 METHOD_BUFFERED,\
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                                                                 FILE_ANY_ACCESS)
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// set the access parameter for this file (0x00220010)
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#define PCICC32_SET_ACCESS_PARA  CTL_CODE(\
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                                                                 FILE_DEVICE_UNKNOWN,\
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                                                                 USER_CONTROL_CODE(4),\
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                                                                 METHOD_BUFFERED,\
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                                                                 FILE_ANY_ACCESS)
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// allow or inhibit CC32 interrupt requests (0x00220014)
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#define PCICC32_CONTROL_INTERRUPTS       CTL_CODE(\
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                                                                 FILE_DEVICE_UNKNOWN,\
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                                                                 USER_CONTROL_CODE(5),\
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                                                                 METHOD_BUFFERED,\
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                                                                 FILE_ANY_ACCESS)
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// requests thru blocking io the status of a pending or a rising interrupt (0x0022001C)
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#define PCICC32_INSTALL_IRQ_BLOCK        CTL_CODE(\
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                                                                 FILE_DEVICE_UNKNOWN,\
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                                                                 USER_CONTROL_CODE(7),\
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                                                                 METHOD_BUFFERED,\
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                                                                 FILE_ANY_ACCESS)
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// requests to access the PLX LCR for test and debug (0x00220020)
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#define PCICC32_ACCESS_LCR       CTL_CODE(\
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                                                                 FILE_DEVICE_UNKNOWN,\
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                                                                 USER_CONTROL_CODE(8),\
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                                                                 METHOD_BUFFERED,\
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                                                                 FILE_ANY_ACCESS)
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// set to check for control-code overflow
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#define PCICC32_LAST_CTL_CODE PCICC32_ACCESS_LCR
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// mask bits for interrupt status
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#define LAM_IRQ             0x00FFFFFF  // there was a LAM responible for the timeout
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#define CONNECTION_TIMEOUT      0x08000000  // irq raised through a connection timout
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#define LAM_BUS_OR          0x10000000  // a LAM-BUS-OR is pending
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#define LAM_NOT_OR          0x20000000  // a LAM-NOT-OR is pending
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#define LAM_AND_OR          0x40000000  // a LAM-AND-OR is pending
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#define LAM_FF              0x80000000  // the LAM-Flip-Flop was set
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// switches for PCICC32_ACCESS_COMMAND.wAccessType
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#define WORD_ACCESS (UCHAR)2   //            word
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#define LONG_ACCESS (UCHAR)4   //            long
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// define bits for PCICC32_ACCESS_COMMAND.wBlockTransfer
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#define UNTIL_NOT_Q         0x0001      // read/write unttil 'not Q' switch
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#define AUTOREAD            0x0002      // PCIADA data pipelining access tuner switch
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// data lane size constants for PCICC32_ACCESS_LCR
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#define BYTE_ACCESS (UCHAR)1   // write byte wise (illegal)
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#define WORD_ACCESS (UCHAR)2   //       word
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#define LONG_ACCESS (UCHAR)4   //       long
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// PCICC32_ACCESS_LCR access constants
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#define LCR_READ       0       // read only access
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#define LCR_WRITE      1       // write and read back access
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#define LCR_OR         2       // read, bitwise 'or' content and read back access
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#define LCR_AND        3       // read, bitwise 'and' content and read back access
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#define LCR_WRITE_ONLY 4       // do not read back after write
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// this structure is output from VPCIC32_GET_STATUS call
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typedef struct
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{
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        ULONG  dwInterface;         // CC32 module number (for compatibility to win95/98 only - not used)
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        USHORT bTimeout;            // denotes a pending PCIADA timeout
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        USHORT bInterrupt;          // denotes a pending LAM interrupt
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} PCICC32_STATUS;    
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// this structure sets the access parameter for following reads or writes to this path
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typedef struct
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{
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        ULONG  dwInterface;        // CC32 module number (for compatibility to win95/98 only - not used)   
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        USHORT wAccessType;                // set the current access type (WORD_ACCESS, LONG_ACCESS)
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        USHORT wBlockTransfer;     // set AUTOREAD or UNTIL_NOT_Q
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} PCICC32_ACCESS_COMMAND;
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// this structure is used to control the interrupts
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typedef struct
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{
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        ULONG  dwInterface;        // CC32 module number (for compatibility to win95/98 only - not used)
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        USHORT wEnable;            // a 1 allows, a 0 inhibits interrupt requests
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} PCICC32_IRQ_CONTROL;
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// this structure returns from a blocking interrupt status call
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typedef struct
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{
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        ULONG  dwInterface;        // CC32 module number (for compatibility to win95/98 only - not used)
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        ULONG  dwInterruptFlags;   // the return status at the return of the blocking call
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} PCICC32_IRQ_RESPONSE;  
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// structure to access the local configuration space of PLX chip (test / debug only) with PCICC32_ACCESS_LCR
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typedef struct
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{
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  ULONG  dwInterface;         // here dummy 'cause of compatibility to WIN95
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  ULONG  dwContent;           // content to write, and, or
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  USHORT wRegisterAddress;    // address offset of LCR register
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  UCHAR  bAccessMode;         // LCR_READ, write, or, and
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  UCHAR  bBytesLane;          // the data access width
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} PCICC32_LCR_ACCESS;
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#endif // __PCICC32_H__