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86 | f9daq | 1 | #ifndef __PCICC32_H__ |
2 | #define __PCICC32_H__ |
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3 | |||
4 | //**************************************************************************** |
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5 | // Copyright (C) 2000-2004 ARW Elektronik Germany |
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6 | // |
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7 | // |
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8 | // This program is free software; you can redistribute it and/or modify |
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9 | // it under the terms of the GNU General Public License as published by |
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10 | // the Free Software Foundation; either version 2 of the License, or |
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11 | // (at your option) any later version. |
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12 | // |
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13 | // This program is distributed in the hope that it will be useful, |
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14 | // but WITHOUT ANY WARRANTY; without even the implied warranty of |
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15 | // MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the |
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16 | // GNU General Public License for more details. |
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17 | // |
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18 | // You should have received a copy of the GNU General Public License |
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19 | // along with this program; if not, write to the Free Software |
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20 | // Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA. |
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21 | // |
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22 | // This product is not authorized for use as critical component in |
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23 | // life support systems without the express written approval of |
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24 | // ARW Elektronik Germany. |
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25 | // |
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26 | // Please announce changes and hints to ARW Elektronik |
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27 | // |
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28 | // Maintainer(s): Klaus Hitschler (klaus.hitschler@gmx.de) |
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29 | // |
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30 | //**************************************************************************** |
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31 | |||
32 | //**************************************************************************** |
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33 | // |
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34 | // pcicc32.h -- the common header for driver and applications for the PCICC32 |
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35 | // PCI to CAMAC Interface |
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36 | // |
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37 | // $Log: pcicc32.h,v $ |
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38 | // Revision 1.7 2004/08/12 19:59:19 klaus |
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39 | // conversion to kernel-version 2.6, released version 6.0 |
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40 | // |
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41 | // Revision 1.6 2002/10/15 19:01:17 klaus |
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42 | // fixed bug in IOCTL defines |
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43 | // |
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44 | // Revision 1.5 2002/04/17 19:41:06 klaus |
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45 | // added support for autoread |
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46 | // |
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47 | // Revision 1.4 2002/04/14 18:25:38 klaus |
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48 | // added interrupt handling, driver 4.4. ...3.5.tar.gz |
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49 | // |
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50 | // Revision 1.3 2002/04/10 18:40:10 klaus |
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51 | // compiled and modified on RedHat 7.2 |
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52 | // |
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53 | // Revision 1.2 2001/11/20 20:12:50 klaus |
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54 | // included new header and CVS log |
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55 | // |
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56 | //**************************************************************************** |
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57 | |||
58 | #include <asm/ioctl.h> |
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59 | |||
60 | #define PCICC32_MAGIC ' ' |
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61 | |||
62 | typedef struct |
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63 | { |
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64 | char bConnected; /* the interface seems to be connected */ |
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65 | char bFail; /* a timeout failure is registered */ |
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66 | char bIrq; /* a LAM wants to generate a IRQ */ |
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67 | char bReserve; /* not yet used */ |
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68 | } PCICC32_STATUS; |
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69 | |||
70 | typedef struct |
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71 | { |
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72 | char bEnable; /* set to 0 to disable, != 0 to enable */ |
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73 | } PCICC32_IRQ_CONTROL; |
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74 | |||
75 | typedef struct |
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76 | { |
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77 | char bOn; |
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78 | } PCICC32_AUTOREAD; |
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79 | |||
80 | #define PCICC32_IOSTATE _IOR(PCICC32_MAGIC, 1, PCICC32_STATUS) /* get the status of PCICC32 */ |
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81 | #define PCICC32_IOCNTRL _IO(PCICC32_MAGIC, 2) /* reset a timeout failure, no parameters */ |
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82 | #define PCICC32_CONTROL_INTERRUPTS _IOWR(PCICC32_MAGIC, 3, PCICC32_IRQ_CONTROL) /* set, clear interrupt enable */ |
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83 | #define PCICC32_IOSTATE_BLOCKING _IOR(PCICC32_MAGIC, 4, PCICC32_STATUS) /* calls a blocking IO until interrupt */ |
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84 | #define PCICC32_AUTOREAD_SWITCH _IOWR(PCICC32_MAGIC, 4, PCICC32_AUTOREAD) /* switches autoread on or off */ |
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85 | |||
86 | // the returned cause of the interrupt |
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87 | #define NOT_MY_INTERRUPT 0 |
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88 | #define PCIADA_INTERRUPT 1 |
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89 | #define CC32_INTERRUPT 2 |
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90 | |||
91 | // the LAM (interrupt) masks |
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92 | #define LAM_IRQ 0x00FFFFFF // there was a LAM responible for the timeout |
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93 | #define CONNECTION_TIMEOUT 0x08000000 // irq raised through a connection timout |
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94 | #define LAM_BUS_OR 0x10000000 // a LAM-BUS-OR is pending |
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95 | #define LAM_NOT_OR 0x20000000 // a LAM-NOT-OR is pending |
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96 | #define LAM_AND_OR 0x40000000 // a LAM-AND-OR is pending |
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97 | #define LAM_FF 0x80000000 // the LAM-Flip-Flop was set |
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98 | |||
99 | #endif /* __PCICC32_H__ */ |