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#ifndef PtsModule__H_
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#define PtsModule__H_
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#define BYTE_PER_DOT 8192
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#define ADR_CSR0 0x00   // D[1] LEDTEST; D[0] RESET
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#define ADR_CLK 0x04    // D[15:12] CLKOUT1; D[11:8] CLKOUT0;
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                                        // D[7:4] SCLK; D[3:0] PCLK
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#define ADR_VMECLK 0x08 // D[3] CLKOUT1; D[2] CLKOUT0;
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                                         // D[1] SCLK; D[0] PCLK
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#define ADR_BUSA_REG 0x10
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#define ADR_BUSA_IN 0x14
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#define ADR_BUSA_DIR 0x18 // D[9:8] BUSA;
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#define ADR_CFG 0x40
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#define ADR_CSR1 0x44 // D[8] DONE; D[1] VCS_; D[0] PROGRAM_
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#define ADR_MODE 0x48
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#define ADR_SYSRESET 0xfc // write D=0 to sysreset
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#define CSR1_PROGRAM_ 0x1
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#define CSR1_VCS_ 0x2
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#define CSR1_DONE 0x100
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#define SELECTMAP_MODE 2
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#define SLAVESERIAL_MODE 3
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  int Pts_erase(uint32_t addr ,int);
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//  int Pts_configure( const char *filename, int mode=SLAVESERIAL_MODE,
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//  int Pts_configure(const char *, int, int );
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  int Pts_configure_bit(uint32_t addr, const char *, int, int);
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//  int Pts_configure_rbt(const char *, int, int);
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  int Pts_check_configure(uint32_t addr,int);
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  int Pts_reset(int);
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//#define PTSADDR 0x50000000
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//#define Pts_write(VME,DATA) VME_write_32(udev,Ext_NoPriv_Data,PTSADDR+(VME),(DATA))
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//#define Pts_read(VME,DATA) VME_read_32(udev,Ext_NoPriv_Data,PTSADDR+(VME),(DATA))
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#endif