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336 | f9daq | 1 | /* |
2 | * data_handling.h |
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3 | * |
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4 | * Created on: 18. dec. 2018 |
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5 | * Author: Domen |
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6 | */ |
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7 | |||
8 | #ifndef SRC_DATA_HANDLING_H_ |
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9 | #define SRC_DATA_HANDLING_H_ |
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10 | |||
11 | |||
12 | #include <stdio.h> |
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13 | #include <stdlib.h> |
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14 | #include <stdint.h> |
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15 | #include <string.h> |
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16 | #include <fcntl.h> |
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17 | #include <math.h> |
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18 | //#include <sys/mman.h> |
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19 | |||
20 | |||
21 | |||
22 | |||
23 | |||
24 | |||
25 | #define HW_address 0x40500000 |
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26 | #define MAP_SIZE 4096UL //size of a /dev/mem file, potrebujem, ko pri funkciji mmap |
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27 | #define MAP_MASK (MAP_SIZE - 1) |
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28 | |||
29 | |||
30 | #define BIN_NUM 1024 |
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31 | #define UC_rd_en_final_mask 0x00000001 |
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32 | #define UC_rd_en_current_mask 0x00000002 |
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33 | #define HIST_MASK 0xFFFFFF00 |
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34 | |||
35 | |||
36 | |||
37 | |||
38 | |||
39 | |||
40 | typedef struct |
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41 | { |
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42 | /* ****** PC --> procesor --> FPGA ****** */ |
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43 | uint32_t start; // zastavica za zagon sistema |
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44 | uint32_t reset; // zastavica za ponastavitev sistema |
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45 | uint32_t HW_config_flag; // zahteva za nastavitev parametrov FPGA vezja |
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46 | uint32_t send_data_flag; // zahteva za posiljanje podatkov v PC |
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47 | uint32_t disconnect_flag; // zahteva za prekinitev povezave procesor - PC |
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48 | uint32_t threshold; // pragovna vrednost za komponento ADC_unit |
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49 | uint32_t acq_window; //casovno okno zajemanja za komponento ADC_unit |
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50 | uint32_t sw_trigger; // pragovna vrednost za prozenje integratorja |
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51 | |||
52 | /* ****** FPGA --> procesor --> PC ****** */ |
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53 | uint32_t hist_data; // stolpec histograma |
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54 | uint32_t UC_rd_en_current; // sprotni histogram |
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55 | uint32_t UC_rd_en_final; // koncni histogram |
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56 | |||
57 | } HW_system; |
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58 | |||
59 | |||
60 | |||
61 | //PUBLIC FUNCTION PROTOTYPES |
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62 | uint32_t *HW_init(void); |
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63 | uint8_t HW_comm( HW_system *strct, uint32_t *reg_addr); |
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64 | |||
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77 | |||
78 | #endif /* SRC_DATA_HANDLING_H_ */ |