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| Rev | Author | Line No. | Line |
|---|---|---|---|
| 326 | f9daq | 1 | #ifndef _SA02_DEF_H |
| 2 | #define _SA02_DEF_H |
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| 3 | |||
| 4 | #define FEB_SINGLE |
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| 5 | #ifdef CAEN_V1495 |
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| 6 | // read data access |
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| 7 | # define FEB_DATA_RDY 0x10c4 |
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| 8 | # define FEB_DATA_RST 0x101c |
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| 9 | //# define FEB_TPENB 0x1020 |
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| 10 | // setup trigger SW or HW |
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| 11 | # define FEB_SEUTRG 0x1028 |
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| 12 | # define FEB_SWTRG 0x1020 |
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| 13 | # ifdef FEB_SINGLE |
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| 14 | # define FEB_DATA_START 0x1030 |
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| 15 | # define FEB_DATA_STOP 0x10c0 |
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| 16 | # else /* FEB_SINGLE */ |
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| 17 | # define FEB_DATA_START 0x1100 |
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| 18 | # define FEB_DATA_STOP 0x1340 |
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| 19 | # endif /* FEB_SINGLE */ |
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| 20 | # define FEB_DATA_INC 0x0004 |
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| 21 | # define FEB_BLTDATA_START 0x0030 |
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| 22 | # define FEB_BLTDATA_STOP 0x00c0 |
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| 23 | # define FEB_SREG 0x10c0 |
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| 24 | # ifdef FEB_SINGLE |
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| 25 | # define FEB_SREG0 FEB_SREG |
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| 26 | # define FEB_SREG1 FEB_SREG |
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| 27 | # define FEB_SREG2 FEB_SREG |
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| 28 | # define FEB_SREG3 FEB_SREG |
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| 29 | # else /* FEB_SINGLE */ // parallel readout |
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| 30 | # define FEB_SREG0 0x10d4 |
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| 31 | # define FEB_SREG1 0x10d8 |
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| 32 | # define FEB_SREG2 0x10dc |
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| 33 | # define FEB_SREG3 0x10e0 |
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| 34 | # endif /* FEB_SINGLE */ |
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| 35 | // write accesss |
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| 36 | # define FEB_REGH 0x1010 |
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| 37 | # define FEB_REGL 0x1014 |
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| 38 | # define FEB_EXEC 0x1018 |
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| 39 | #endif /* CAEN_V1495 */ |
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| 40 | |||
| 41 | #ifdef BELLEPTS |
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| 42 | |||
| 43 | |||
| 44 | |||
| 45 | # define FEB_BLTDATA_START FEB_DATA_START |
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| 46 | # define FEB_BLTDATA_STOP FEB_DATA_STOP |
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| 47 | |||
| 48 | // data access |
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| 49 | #define FEB_DATA 0x0100 |
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| 50 | #define FEB_DATA_INC 0x0100 |
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| 51 | |||
| 52 | #define FEB_CHADDR 0x0104 |
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| 53 | #define FEB_CNTR 0x0108 |
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| 54 | // write accesss |
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| 55 | #define FEB_DATAOUT0 0x010C |
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| 56 | #define FEB_DATAOUT1 0x0110 |
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| 57 | // read access |
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| 58 | #define FEB_DATAIN0 0x0114 |
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| 59 | #define FEB_DATAIN1 0x0118 |
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| 60 | |||
| 61 | |||
| 62 | #define FEB_DATA_RST 0x0500 |
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| 63 | #define FEB_DATA_RDY 0x0504 |
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| 64 | #define FEB_DAQMODE 0x0508 |
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| 65 | #define FEB_SWTRG 0x050C // sw trigger |
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| 66 | #define FEB_SELTRG 0x0510 // disable bits: 0-hw,1-sw |
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| 67 | |||
| 68 | #define FEB_SETNEVE 0x0514 |
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| 69 | #define FEB_GETNEVE 0x0518 |
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| 70 | #define FEB_DEBUGMON 0x051C |
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| 71 | #define FEB_SEUTRG 0x0520 // seu sw trigger |
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| 72 | |||
| 73 | |||
| 74 | #define FEB_DEADBEEF 0x0FFC // register with a value 0xdeadbeef |
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| 75 | #endif /* BELLEPTS */ |
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| 76 | |||
| 77 | // SA02 commands |
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| 78 | |||
| 79 | #define FEB_INIT 0x00000000 |
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| 80 | #define FEB_CREG 0x01000000 |
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| 81 | #define FEB_SHFT_CLK 0x01000000 |
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| 82 | #define FEB_SEND_CLK 0x02000000 |
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| 83 | #define FEB_SEL_MON 0x03000000 |
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| 84 | #define FEB_MUX 0x03000000 |
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| 85 | #define FEB_SEL_DATA 0x04000000 |
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| 86 | |||
| 87 | #define FEB_TP 0x05000000 |
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| 88 | #define FEB_DLY0 0x06000000 |
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| 89 | #define FEB_SERIAL 0x08000000 |
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| 90 | #define FEB_DPM 0x09000000 |
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| 91 | #define FEB_VTH2 0x090000B0 |
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| 92 | #define FEB_VTH1 0x090000B1 |
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| 93 | #define FEB_TPLVL0 0x090100B0 |
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| 94 | #define FEB_TPLVL1 0x090100B1 |
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| 95 | |||
| 96 | #define DPM_WRITE 0x00B00000 |
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| 97 | #define DPM_CH1 0x00010000 |
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| 98 | |||
| 99 | #define FEB_SUBA_INC 0x00010000 |
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| 100 | #define FEB_RO 0x80000000 |
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| 101 | |||
| 102 | #define SA0x_ASIC0_CREG 0x0A000000 |
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| 103 | #define SA0x_ASIC0_GREG 0x0B000000 |
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| 104 | #define SA0x_ASIC0_CMON 0x0C000000 |
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| 105 | |||
| 106 | #define FEB_TMON0 0x0D000000 |
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| 107 | #define FEB_TMON1 0x0D010000 |
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| 108 | |||
| 109 | #define FEB_ADC_READ 0x0E000000 |
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| 110 | #define FEB_ADC_RESET 0x0E010000 |
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| 111 | |||
| 112 | #define ASIC_PHASECMPS 0x0000003 |
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| 113 | #define ASIC_GAIN 0x000000c |
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| 114 | #define ASIC_SHAPINGTIME 0x0000030 |
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| 115 | #define ASIC_COMPARATOR 0x0000040 |
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| 116 | #define ASIC_VRDRIVE 0x0007F80 |
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| 117 | #define ASIC_MONITOR 0x0018000 |
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| 118 | #define ASIC_ID 0x3FE0000 |
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| 119 | |||
| 120 | #define ASIC_DECAYTIME 0x000007 |
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| 121 | #define ASIC_OFFSET 0x000078 |
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| 122 | #define ASIC_FINEADJ_UNIPOL 0x000780 |
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| 123 | #define ASIC_FINEADJ_DIFF 0x007800 |
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| 124 | #define ASIC_TPENDB 0x010000 |
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| 125 | #define ASIC_KILL 0x100000 |
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| 126 | |||
| 127 | #define ASIC_PHASECMPS_SHFT 0 |
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| 128 | #define ASIC_GAIN_SHFT 2 |
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| 129 | #define ASIC_SHAPINGTIME_SHFT 4 |
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| 130 | #define ASIC_COMPARATOR_SHFT 6 |
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| 131 | #define ASIC_VRDRIVE_SHFT 7 |
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| 132 | #define ASIC_MONITOR_SHFT 15 |
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| 133 | #define ASIC_ID_SHFT 17 |
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| 134 | |||
| 135 | #define ASIC_DECAYTIME_SHFT 0 |
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| 136 | #define ASIC_OFFSET_SHFT 3 |
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| 137 | #define ASIC_FINEADJ_UNIPOL_SHFT 7 |
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| 138 | #define ASIC_FINEADJ_DIFF_SHFT 11 |
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| 139 | #define ASIC_TPENDB_SHFT 16 |
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| 140 | #define ASIC_KILL_SHFT 17 |
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| 141 | |||
| 142 | #endif /* _SA02_DEF_H */ |