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291 f9daq 1
#ifndef easiroc_H
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#define easiroc_H
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#include<stdio.h>
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#include<stdlib.h>
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#include<errno.h>
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#include <Winsock2.h>
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#define sizeByte_SC  15
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#define sizeByte_PSC 5
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#define sizeByte_RSC 1
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#define sizeByte_PIN 2
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#define WRITEDATA_DELAY 40
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//------------------------------------------------------------------------------------------------------ 
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int easiroc_Init(const char* SiTCP_MASTER_IP, unsigned int daq_mode) ;
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void easiroc_Close();
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int  WriteData(SOCKET sock, unsigned int data);
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void PrepareFPGA();
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int DebugFPGA(SOCKET socket);
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void PrepareSC(int chipNo);
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int TransmitSC(SOCKET socket);
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void PrepareReadSC(int chipNo);
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int TransmitReadSC(SOCKET socket);
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int PreparePSC(int CurrentCh, int CurrentProbeType);
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int ADCOneCycle_wHeader_ver2(SOCKET socket, FILE* file);
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void ADCStop(SOCKET socket);
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int ContinuousADC_ver2(SOCKET socket, char *file_name, int MaxCycleNum);
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int easiroc_fTransmitSC();
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int easiroc_fTransmitReadSC();  
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int easiroc_fAsicInitialize();
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int easiroc_fTransmitProbe(int CurrentCh, int CurrentProbe);  
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int easiroc_fDAQ(char *file_name, int MaxCycleNum);  
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#endif